Semiconductor devices, such as EEPROMs or Flash devices, may be desired to be run using a voltage supply that provides a lower supply voltage. The lower supply voltage allows the device to consume less power and be shrunk to smaller geometries. For example, lower voltages are desired for applications such as EEPROMs used in smart cards. Although lower supply voltages are desired for the semiconductor devices, higher voltages may be desired for certain operations. For example, a voltage that is higher than the supply voltage may be required for operations such as programming memory cells. In order to obtain the higher voltages, a conventional charge pump may be used.
FIG. 1 depicts a conventional charge pump 10, which can be used to increase voltages above the supply voltage or provide a reverse polarity voltage. The conventional charge pump 10 includes a conventional capacitor-diode ladder 12 and a conventional oscillator 20 coupled with a voltage supply 22. The conventional capacitor-diode ladder 12 includes capacitor-diode pairs 13 (including capacitor 14 and diode 24), 15 (including capacitor 16 and diode 24), and 17 (that includes capacitor 18 and diode 28). The conventional oscillator 20 outputs clocks signals CLK and CLKB. The signal CLKB is the inverse of the signal CLK.
Based on the signals CLK and CLKB, the capacitor-diode pairs 13, 15, and 17 alternately charge to approximately the supply voltage and discharge. For example, the capacitor-diode pair 13 charges the capacitor 14, then discharges the capacitor 14, with a period corresponding to the frequency of the clock signal CLK. In addition, the charging and discharging between stages alternate. Thus, for example, as the capacitor 14 discharges, the next capacitor 16 charges. The charging and discharging of capacitors 14, 16, and 18 in the capacitor-diode ladder 12 allows for energy to be transferred between capacitor-diode pairs 13, 15, and 17, and output. This energy is also transferred at the output 30 of the conventional charge pump 10 by an output current provided at the output 30. Thus, a voltage above that of the conventional voltage supply 22 can be provided.
Although the conventional charge pump 10 functions, one of ordinary skill in the art will readily recognize that for lower supply voltages, the ability of the conventional charge pump 10 to provide a voltage in excess of the supply voltage while maintaining a sufficient output current may be compromised. The conventional charge pump 10 may provide a high voltage, for example on the order of fifteen or sixteen volts, even at low supply voltages. When providing such voltages using a low supply voltage, the charge pump 10 provides a lower output current from the output 30 because charge is output at a lower rate from the capacitor-diode ladder 12. Furthermore, the high voltage from by the conventional charge pump 10 may be provided to devices (not shown) such as other NMOS or PMOS devices in the semiconductor device. This high voltage may be on the order of the breakdown voltage of such devices. The leakage induced by breakdown leakage and the punch through leakage must be overcome using the output current in order for the desired operations to be performed. As the output current of the conventional charge pump 10 decreases, the effect of the leakage becomes more marked. Consequently, as the supply voltage decreases, a loss of output current from the output 30 may result. As a result, the ability of the conventional charge pump 10 to provide a sufficient output current in combination with a high voltage may be adversely affected. The conventional charge pump 10 may, therefore, be unable to provide sufficient power for operations such as programming EEPROMs in applications using lower supply voltages, such as smart cards.
Accordingly, what is needed is a method and system for providing a voltage higher than the supply voltage in lower supply voltage devices while maintaining a sufficient output current. The present invention addresses such a need.